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Chipscale Signal Access Tool (SAT) Application Instructions

Background:

The CSP Signal Access Tool (SAT) has been designed to be used in the prototype stage of product development to provide test point access (debug, test, and functional validation) of Intel's Flash Memory and other microBGA packages while soldered to the printed circuit board.

Each SAT has been specifically designed to be footprint and size compatible (allowing a .025" inch Max. microBGA package dimension perimeter to allow for test point access for test clips, probes, or MicroGripper(TM) test clips). The SATs are constructed using standard PCB FR4 material and 63/37 SnPb eutectic solder balls (same as the microBGA package), so the reflow profiles are the same as microBGA packages and other Intel Flash TSOP Packages.

The SAT/microBGA package attachment requires a two-step reflow process that utilizes solder paste (recommended) or solder flux only and industry-standard rework stations. The SAT is first attached to the target PCB and subjected to the first reflow process, then the actual microBGA package is attached to the top of the SAT and the reflow process is repeated.

Materials Required:

  • Rework station (preferably equipped with split vision alignment capability)
  • Solder paste or gel-based solder flux
  • Fine-tip nylon brush
  • Lint-free Q-tip

Note: Although solder paste is recommended for SAT/microBGA package attachment, some rework stations may not have solder paste application capability. If this is the case, gel-based solder fluxes have been used successfully; however, due to multiple gel-based solder flux suppliers, it is recommended to first consult your supplier to ensure their flux is compatible with HASL surface finishes and 63/37 eutectic .013" diameter solder balls. Most gel-based no-clean solder fluxes have been applied with great success. Example of solder flux used: A.P.E. South no-clean flux paste.

Rework nozzle size should fit the various applications. However, this process has also been qualified using oversized nozzles allowing a clearance between the SAT/microBGA package and the PCB. Refer to your site requirements for heating adjacent components during the reflow process. Keep in mind that the SAT has been specifically designed for the prototype and debug stage of product development (non-production).

Procedure:

If using solder paste:

Apply the solder paste using the appropriate micro-stencil and squeegee and subject Assy. to the reflow process (see reflow profile below).
If using gel-based solder flux only:

Using a fine-tip nylon brush or similar applicator, apply a very small amount of flux over the PCB landpads. Apply flux in an even fashion approximately 4-6 mils thick. Subject Assy. to reflow process (see reflow profile below).

IMPORTANT: The gel-based solder flux application is the most critical step of the process. If excessive flux is applied, the surface tension may collapse the solder balls or pull down the SAT, which may cause alignment/continuity issues.

Repeat the same process to attach the microBGA package to the top of the SAT.

Reflow Profile Guideline:

Use correct rework profile for the package. The microBGA package has been qualified to use the same rework profiles as Intel's TSOP packages. If creating a new profile, target the peak profile to 213 - 233° C for a dwell time above liquidus (183° C) at 60 seconds as measured at the solder joint junction.

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